发明名称 Method for manufacturing electronic device
摘要 A method for manufacturing an electronic device, in which a via hole and a trench for an interconnect are integrally provided in an interlayer insulating film formed on a substrate, and the via hole and the trench for the interconnect are plugged with an electric conductor film is provided. The method includes: forming a via hole in the interlayer insulating film; forming a resin film plugging the via hole on the interlayer insulating film; etching the resin film exposed outside the via hole off with an etching gas mainly containing an active hydrogen species to form a dummy plug composed of the resin film in the via hole; forming a resist mask having an opening for an interconnect on the dummy plug and on the interlayer insulating film.
申请公布号 US2006094221(A1) 申请公布日期 2006.05.04
申请号 US20050258189 申请日期 2005.10.26
申请人 NEC ELECTRONICS CORPORATION 发明人 SODA EIICHI;ISHIMORI HITOSHI
分类号 H01L21/44 主分类号 H01L21/44
代理机构 代理人
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