| 摘要 |
A microcomputer that can increase the usage efficiency of a cache memory and increase the process speed is provided. In this microcomputer, a group of registers hold cache usage information that specifies whether the cache memory is to be used in execution of a process. When processes to be executed are switched, a process switch control circuit obtains the cache usage information of the next process from the group of registers, and stores the cache usage information in a first register. After the storing of the cache usage information in the first register, a cache control circuit stores the cache usage information in a second register. In accordance with the cache usage information stored in the second register, the cache control circuit puts the cache memory in a usable state or an unusable state.
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