| 摘要 |
Disclosed herein is a stacked semiconductor multi-chip package. The semiconductor multi-chip package comprises a substrate, a lower die mounted on an upper surface of the substrate to electrically connect to a circuit printed in a pattern on the substrate, an upper die electrically connected to the substrate via at least one conductive wire, and at least one metal layer stacked over an upper surface of the lower die, while allowing the upper die to be mounted on an upper surface of the metal layer, such that the metal layer may be connected to the upper die via at least one upper grounding wire while being connected to the substrate via at least one lower grounding wire. The package can release heat generated from the package to the outside, stably maintain a ground potential between the upper die and the substrate, and prevent mutual interference of noise signals between the upper and lower dies.
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