| 摘要 |
A memory structure comprises two bit lines, a first gate dielectric, a second gate dielectric, at least one first gate, a second gate and a third gate, a first dielectric spacer and a second dielectric spacer, where the two bit lines are formed in the semiconductor substrate, the first gate dielectric, and the second gate dielectric are between the two bit lines, in which at least one of the first and second gate dielectrics includes a silicon nitride. For instance, a first gate dielectric is made of ONO, whereas the second gate dielectric is composed of silicon oxide. The first gate is formed above the first gate dielectric, the second gate is formed above the second gate dielectric and is substantially perpendicular to the first gate, and the third gate is substantially parallel to the second gate. The second gate is insulated from the first gate by the first dielectric spacer, whereas the second gate is insulated from the third gate by the second dielectric spacer. As a result, one more gate serving as a word line in a certain area is added, and thus the word line density can be almost doubled.
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