发明名称 Bond pad structure for integrated circuit chip
摘要 An integrated circuit chip is provided, which includes a bond pad structure, a low-k dielectric layer, and active circuits. The bond pad structure includes a conductive bond pad, an M<SUB>top </SUB>solid conductive plate, and an M<SUB>top-1 </SUB>solid conductive plate. The M<SUB>top </SUB>solid conductive plate is located under the bond pad. The M<SUB>top </SUB>plate is electrically coupled to the bond pad. The M<SUB>top-1 </SUB>solid conductive plate is located under the M<SUB>top </SUB>plate. A low-k dielectric layer is located under the bond pad of the bond pad structure. At least part of an active circuit is located under the bond pad of the bond pad structure.
申请公布号 US2006091566(A1) 申请公布日期 2006.05.04
申请号 US20040989481 申请日期 2004.11.16
申请人 YANG CHIN-TIEN;CHANG SHOU Z;CAO MIN;MII YUH-JIER 发明人 YANG CHIN-TIEN;CHANG SHOU Z.;CAO MIN;MII YUH-JIER
分类号 H01L23/48 主分类号 H01L23/48
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