| 摘要 |
A set of source instructions that complies with a source architecture is dynamically translated into a set of target instructions that complies with a target architecture. At least some of exception-related dependencies between faulty instructions and their immediate preceding instructions, in the translated target instruction binary code, are removed. Instead, dependencies between mapping registers and their representative registers that are associated with the faulty instructions are created. Computations of the values of mapping registers, for the recovery of canonical registers, are delayed until exceptions are actually detected during execution of the target instructions. The restoration of context of source instructions at the exception-related recovery points is realized through the invoking of associated recovery functions.
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