| 摘要 |
There is provided a test having a pattern generating section for generating a test pattern, an expected value generating section for generating an expected value, an inversion cycle generating section for generating an expected value pattern of an output signal in which bits in a cycle of the expected value pattern in the output data corresponding to the cycle in which the electronic device outputs the data by inverting the bits thereof, an H-level judging section for outputting H fail data per bit of the expected value pattern of the output signal, a L-level judging section for outputting L fail data per bit of the expected value pattern of the output signal, a fail memory and selecting sections for switching a logic value of the H fail data and a logic value of the L fail data when the inversion cycle generating section inverts the bits of the expected value pattern.
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