发明名称 |
Electrostatic discharge protection in a semiconductor device |
摘要 |
An ESD protection circuit for protecting a circuit from an ESD event occurring between a first voltage supply node and a second voltage supply node associated with the circuit to be protected includes an MOS device having a gate terminal, a first source/drain terminal and a second source/drain terminal. The first source/drain terminal is connected to the first voltage supply node and the second source/drain terminal is connected to the second voltage supply node. The ESD protection circuit further includes a trigger circuit coupled to the gate terminal of the MOS device. The trigger circuit is configured to generate a control signal at the gate terminal of the MOS device for activating the MOS device during the ESD event. At least a portion of the trigger circuit is formed in a floating well which becomes biased to a voltage that is substantially equal to a first voltage when the first voltage is supplied to the first voltage supply node or to a second voltage when the second voltage is applied to the second voltage supply node, whichever voltage is greater.
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申请公布号 |
US2006092589(A1) |
申请公布日期 |
2006.05.04 |
申请号 |
US20040977881 |
申请日期 |
2004.10.29 |
申请人 |
BHATTACHARYA DIPANKAR;KRIZ JOHN C;MORRIS BERNARD L;SMOOHA YEHUDA |
发明人 |
BHATTACHARYA DIPANKAR;KRIZ JOHN C.;MORRIS BERNARD L.;SMOOHA YEHUDA |
分类号 |
H02H9/00 |
主分类号 |
H02H9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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