发明名称 |
Data arrangement control signal generator for use in semiconductor memory device |
摘要 |
A data arrangement control signal generation circuit for use in a semiconductor memory device includes a plurality of data arrangement control signal generation units connected in series, each for selectively generating a data arrangement control signal according to a column address strobe (CAS) latency.
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申请公布号 |
US2006092722(A1) |
申请公布日期 |
2006.05.04 |
申请号 |
US20040024458 |
申请日期 |
2004.12.30 |
申请人 |
HYNIX SEMICONDUCTOR, INC. |
发明人 |
SHIN BEOM-JU |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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