| 摘要 |
There has been a problem involved in the prior art that complex commands, a large number of operation stages, complex flip-flops, control of switching of transmission/reception, control of a memory address counter, complex logical circuits such as a data comparator circuit are needed to repeat transmission/reception of a recognition number to/from an interrogator in units of one bit, and the chip size cannot be reduced. When a carrier of high frequency modulated with clock pulses is sent from an antenna of an interrogator for reading a recognition number in a responder through radio to the responder, a first sequence of clock pulses with short intervals therebetween and a second sequence of clock pulses with long intervals therebetween are combined so as to control the reading of the recognition number by the interrogator. Thus, the size of the semiconductor chip of the responder can be reduced, suppressing an increase of the cost of the semiconductor chip.
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