FET CHANNEL HAVING A STRAINED LATTICE STRUCTURE ALONG MULTIPLE SURFACES

摘要

A channel 16 of a FinFET 10 has a channel core 24 and a channel envelope 32, each made from a semiconductor material defining a different lattice structure to exploit strained silicon properties. A gate is coupled to the channel envelope through a gate dielectric. Exemplary materials are Si and Si<SUB>x</SUB>Ge<SUB>1-x</SUB>, wherein 78<x<92. The channel core 24 has a top surface 26 of width w<SUB>c </SUB>and an upstanding surface 28, 30 of height h<SUB>c</SUB>, preferably oriented 90° to one another. The channel envelope 32 is in contact with the top 26 and upstanding surfaces 28, 30 so that the area of interface is increased as compared to contact only along the top surface 26, improving electrical conductivity and gate 18 control over the channel 16. The height h<SUB>c </SUB>can be tailored to enable a smaller scale FET 10 within a stabilized SRAM. Various methods of making the channel 16 are disclosed, including a mask and etch method, a handle wafer/carrier wafer method, and a shallow trench method. Embodiments and methods for FinFETs with one to four gates are disclosed.