发明名称 |
Phase detector and signal locking system controller |
摘要 |
A phase detector and signal locking system controller for use in a digital phase-locked loop (PLL) application includes a first and a second phase detector where the first phase detector result is used to control the initial pull-in and the second phase detector is used to control fine tuning once the phase differences are too small for appropriate detection by the first phase detector. A post processing and control unit operates to effectively merge the two phase detector outputs and to apply the appropriate gain factor that can be used to control a PLL system.
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申请公布号 |
US7039148(B1) |
申请公布日期 |
2006.05.02 |
申请号 |
US20010921797 |
申请日期 |
2001.08.02 |
申请人 |
SEMTECH CORPORATION |
发明人 |
LAMB JONATHAN;BRUCHNER WOLFGANG;LANSDOWNE RICHARD |
分类号 |
H03L7/087 |
主分类号 |
H03L7/087 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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