发明名称 |
Metal-insulator-metal (MIM) capacitor structure formed with dual damascene structure |
摘要 |
A microelectronic product and a method for fabricating the same each provide a capacitor formed interposed between a first dielectric layer and a second dielectric layer formed over a substrate having a first contact region and a second contact region exposed therein. The capacitor is also connected to a first conductor stud that penetrate4s the first dielectric layer and contacts the first contact region and a second conductor stud that penetrates the second dielectric layer. A contiguous conductor interconnect and conductor stud layer is formed within a dual damascene aperture through the second dielectric layer and the first dielectric layer and contacting the second contact region. An etch stop layer employed when forming a trench within the dual damascene aperture also passivates a capacitor sidewall.
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申请公布号 |
US7038266(B2) |
申请公布日期 |
2006.05.02 |
申请号 |
US20040791246 |
申请日期 |
2004.03.01 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD |
发明人 |
WANG SUNG HSIUNG |
分类号 |
H01L27/108;H01L21/02;H01L21/768;H01L29/76;H01L29/94;H01L31/119 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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