Two-transistor flash cell for large endurance application

摘要

An nonvolatile memory device having improved endurance is comprised of an array of nonvolatile memory cells arranged in rows and columns. Each memory cell is composed of a program transistor and read transistor with a control gate connected to a word line, a source connected the source select line, and a floating gate onto which an electronic charge is placed representing a data bit stored within the nonvolatile memory device. The program transistor has a drain connected a first bit line and a read transistor has a drain connected to the second bit line. Each memory cell has a floating gate connector joining the floating gate of the read transistor to the floating gate of the read transistor. The nonvolatile memory device has a voltage controller that programs the each memory cell by programming the program transistor and reading the read transistor.