| 摘要 |
The present invention provides a modulation and demodulation system capable of minimizing a bit error rate in a six-phase phase modulation method. A senary signal phase-modulated and outputted by a modulator of a first embodiment is received and phase-modulated by a destination demodulator to a binary signal before conversion by the modulator. The modulator assigns (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) which are senary signals (b<SUB>i</SUB>, t<SUB>i</SUB>) to first to sixth phases respectively. The demodulator performs a conversion process from the senary signals to the binary signals, for instance, by storing transmitted senary signals and sequentially converting every senary signal of length m to binary signal of length b so as to output them. The process of the demodulator assigns the first to sixth phases as the senary signals (b<SUB>i</SUB>, t<SUB>i</SUB>) to (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) respectively. The modulator of a second embodiment assigns (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) to the first to sixth phases respectively by having the senary signals expressed as (Bi, Ti) with i=1 as a first symbol, i=2 as a second symbol, the binary signal as Bi and ternary signal as Ti. The demodulator performs a conversion process from the senary signals to the binary signals, for instance, by storing the transmitted senary signals and sequentially converting every 2 pieces of them to 5 pieces of binary signal so as to output them. The process of the demodulator assigns the first to sixth phases as the senary signals (Bi, Ti) to (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) respectively.
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