发明名称 |
Process for a contact plug on a region of an integrated circuit, in particular on the electrodes of a transistor |
摘要 |
<p>The process involves locally modifying a region to create a zone which extends as far as part of the surface of the region where the zone is formed from a material that can be removed selectively with respect to the material of the region. The region is covered with an insulating material. An orifice is formed emerging at the surface of the zone in the insulating material. The selectively removable material is removed from the zone through the orifice to form a cavity instead of the zone. The cavity and the orifice are filled with an electrically conducting material, the thickness of which is less than 50 nm. The material of the region is a silicon-based material, such as single-crystal silicon or polycrystalline silicon, and the selectively removable material is a silicon-germanium alloy.</p> |
申请公布号 |
EP1650796(A2) |
申请公布日期 |
2006.04.26 |
申请号 |
EP20050292061 |
申请日期 |
2005.10.04 |
申请人 |
STMICROELECTRONICS (CROLLES 2) SAS;STMICROELECTRONICS SA |
发明人 |
LENOBLE, DAMIEN;CORONEL, PHILIPPE;CERUTTI, ROBIN |
分类号 |
H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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