| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an apparatus for performing a channel-to-channel delay correction and frame synchronization with low latency. <P>SOLUTION: The apparatus includes, on each of a plurality of channels, a clock-and-data recovery circuit (CDR); a frequency divider circuit for generating a frequency-divided clock of a recovery clock; a serial-to-parallel converter circuit (SP) for detecting the phase difference between the phase of the frequency-divided clock and the phase of a signal obtained by frequency-dividing a clock signal internal to the device, applying an adjustment so as to reduce the phase difference, and converting the data signal outputted from the CDR to parallel data; a register array for holding the output of the SP circuit; and a frame-head detector for detecting a frame head from the output of the register array and outputting a frame detection signal. There are also provided a circuit that receives the frame detection signals from each of the channels and detects a channel on which the frame head was detected last, and a circuit for adjusting the detected frame head, the phase of the internal clock signal and the phase of a frequency-divided clock of a recovery clock of the channel so as to coincide. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
