发明名称 Verfahren und Anordnung zur Verschlüsselung/Entschlüsselung auf der Basis des Montgomery-Verfahrens unter Verwendung von effizienter modularer Multiplikation
摘要 In a modular multiplication circuit which operates under the conditions 0 < N < 2<n>, 0 </= A, B < 2N, R = 2<n+2>, a first multiplier performs multiplication between input values A and B. A second multiplier performs multiplication between the output of the first multiplier and [-(N<-><1> mod R)], which is decided by set parameters N and R, and outputs M. A third multiplier performs multiplication between the output M and the set parameter N and outputs the product M x N. An adder adds the output of the first multiplier and the output of the third multiplier, and a shift register shifts the sum leftward by n+2 bits. Thus, an output P = (A x B + M x N)/R is produced. <IMAGE>
申请公布号 DE69434422(T2) 申请公布日期 2006.04.20
申请号 DE1994634422T 申请日期 1994.11.29
申请人 CANON K.K., TOKIO/TOKYO 发明人 YAMAMOTO, TAKAHISA;IWAMURA, KEIICHI
分类号 H04L9/30;G06F7/72;H04L9/18 主分类号 H04L9/30
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