发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD OF THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device for suppressing the increase in a chip area, even if the number of pads is increased. SOLUTION: The semiconductor integrated circuit is provided with an entire surface of the essential surfaces formed with circuit elements constituting an integrated circuit which is used as a circuit area 2, comprising an insulating film formed on the essential surface, an internal wiring layer formed on the insulating film, pads 10 disposed on the insulating film by having them overlapped on the circuit area 2, an input circuit arranged in the circuit area 2, and an opening for electrically connecting the pads 10 formed on the insulating film and the input circuit via the internal wiring layer. Then, an electrical connecting path of the pads 10 to the internal wiring layer is set, by disposing the pads 10 overlapped on the internal wiring layer of the input circuit which is formed by connecting the circuit elements. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006108699(A) 申请公布日期 2006.04.20
申请号 JP20050322347 申请日期 2005.11.07
申请人 TOSHIBA CORP 发明人 MOMOHARA TOMOYOSHI
分类号 H01L21/822;H01L21/3205;H01L21/82;H01L23/12;H01L23/52;H01L27/04 主分类号 H01L21/822
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