摘要 |
<p>A flash memory includes a protect area (PA) where reading of specified blocks is inhibited, while a RAM, which is used as a work area of a program, also includes a protect area (PA1) where reading of specified blocks is inhibited. A bus state controller (3) compares the value of a program counter with the value of an address signal to inhibit reading from the areas other than the protect area (PA) for the flash memory and to control the data of the protect area (PA1) for the RAM such that reading form the protect area (PA) in the flash memory is inhibited. For example, if a user is to read the data of the protect area (PA) from an accessible user access area, meaningless data, such as H'FFFF or the like, is outputted from the bus state controller (3) via a data bus.</p> |
申请人 |
RENESAS TECHNOLOGY CORP.;OSHIBA, MASASHI;KISHI, HIROSHI;SATO, YOSHIAKI;YAMAKI, YOKO;YAMAKAWA, KENTARO |
发明人 |
OSHIBA, MASASHI;KISHI, HIROSHI;SATO, YOSHIAKI;YAMAKI, YOKO;YAMAKAWA, KENTARO |