摘要 |
PROBLEM TO BE SOLVED: To provide a turbo decoder the increase in the circuit scale of which is suppressed. SOLUTION: A turbo decoder includes: a first element decoding unit 12 for obtaining a first information likelihood A<SB>1</SB>on the basis of an information bit sequence S, a first redundant bit sequence P<SB>1</SB>, and a first prior likelihood L<SB>1</SB>; a first subtractor 16 for subtracting the first prior likelihood L<SB>1</SB>from the first information likelihood A<SB>1</SB>; a first interleaver 18 for interleaving the output of the first subtractor 16; a second interleaver 19 for interleaving the information bit sequence S; a prior likelihood arithmetic section 40 for subtracting the doubled output of the second interleaver 19 from the output of the first interleaver 18 to obtain a second prior likelihood L<SB>2</SB>; a second element decoding unit 22 for obtaining a second information likelihood A<SB>2</SB>on the basis of the output of the second interleaver 19, a second redundant bit sequence P<SB>2</SB>, and the second prior likelihood L<SB>2</SB>; a first de-interleaver 32 for de-interleaving the second information likelihood A<SB>2</SB>; and a hard decision unit 34 for applying hard decision to the output of the first de-interleaver 32, and the first prior likelihood L<SB>1</SB>is obtained on the basis of the second information likelihood A<SB>2</SB>. COPYRIGHT: (C)2006,JPO&NCIPI
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