发明名称 Method for production of charge-trapping memory cells
摘要 An oxide layer, a nitride layer, and a layer of amorphous silicon are applied to a surface of a semiconductor substrate. A resist mask is applied and implantations are performed to form doped regions of source and drain and doped regions within the amorphous silicon layer. The resist mask and undoped parts of the amorphous silicon are removed to form a silicon mask. The silicon mask is applied to etch back the nitride layer. After a removal of the silicon mask, the nitride is oxidized to form an oxide-nitride-oxide layer sequence, which is laterally restricted to the area above the source/drain regions.
申请公布号 US2006084268(A1) 申请公布日期 2006.04.20
申请号 US20040967014 申请日期 2004.10.15
申请人 VERHOEVEN MARTIN 发明人 VERHOEVEN MARTIN
分类号 H01L21/302;H01L21/461 主分类号 H01L21/302
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