发明名称 Integrated circuit device and testing method thereof
摘要 An integrated circuit device has a plurality of memory macros that include a redundant circuit to replace a defective cell and a plurality of bits of nonvolatile memory elements that store redundant replacement information to replace a defective cell of a first memory macro selected from the plurality of memory macros with the redundant circuit. The redundant replacement information is transferred with a plurality of bits in parallel from the plurality of bits of nonvolatile memory elements to the plurality of memory macros.
申请公布号 US2006083085(A1) 申请公布日期 2006.04.20
申请号 US20050240767 申请日期 2005.10.03
申请人 NEC ELECTRONICS CORPORATION 发明人 IKEGAMI JUNICHI
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
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