| 摘要 |
According to the present invention, there is provided a semiconductor devise comprising: a gate electrode formed via a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a source region and drain region formed in a surface portion of said semiconductor substrate on two sides of a channel region positioned below said gate electrode; a capacitor insulating film formed in the surface portion of said semiconductor substrate to cover an inner surface near a bottom portion of a trench formed adjacent to one of said source region and drain region; a capacitor electrode formed to be buried in said trench covered with said capacitor insulating film; an insulating film formed to cover an inner surface of said trench, which is not covered with said capacitor insulating film; a conductive layer containing a predetermined impurity and formed in said trench so as to be buried in a portion covered with said insulating film on said capacitor electrode; a surface connecting layer formed on the surface of said semiconductor substrate to electrically connect said conductive layer and one of said source region and drain region; and an impurity diffusion inhibiting film formed to cover the inner surface of said trench to a predetermined depth from an interface between said surface connecting layer and conductive layer, and having a film thickness smaller than that of said insulating film.
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