发明名称 Process for fabricating a self-aligned deposited source/drain insulated gate field-effect transistor
摘要 Processes for forming self-aligned, deposited source/drain, insulated gate, transistors and, in particular, FETs. By depositing a source/drain in a recess such that it remains only in the recess, the source/drain can be formed self-aligned to a gate and/or a channel of such a device. For example, in one such process a gate structure of a transistor may be formed and, in a material surrounding the gate structure, a recess created so as to be aligned to an edge of the gate structure. Subsequently, a source/drain conducting material may be deposited in the recess. Such a source/drain conducting material may be deposited, in some cases, as layers, with one or more such layers being planarized following its deposition. In this way, the conducting material is kept within the boundaries of the recess.
申请公布号 US2006084232(A1) 申请公布日期 2006.04.20
申请号 US20050166286 申请日期 2005.06.23
申请人 发明人 GRUPP DANIEL E.;CONNELLY DANIEL J.;CLIFTON PAUL A.;FAULKNER CARL M.
分类号 H01L21/336 主分类号 H01L21/336
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