发明名称 |
Memory controller for supporting a plurality of different memory accesse modes |
摘要 |
A common DRAM controller is provided for supporting a plurality of memory types such as double data rate or quad data rate mode or types. The controller is adapted to use a number of clock signals to process data. The controller can further delay the data for a predetermined time period and capture the same.
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申请公布号 |
US7032092(B2) |
申请公布日期 |
2006.04.18 |
申请号 |
US20020236794 |
申请日期 |
2002.09.06 |
申请人 |
VIA TECHNOLOGIES, INC. |
发明人 |
LAI JIIN |
分类号 |
G06F12/00;G06F13/16;G06F13/42;G11C5/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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