发明名称 Mechanism for recognizing and abstracting memory structures
摘要 A mechanism is disclosed for recognizing and functionally abstracting a column of memory cells. According to one embodiment, a column of n (where n is an integer greater than 1) memory cells is identified in a description of a circuit. One of the n memory cells is selected as a representative memory cell. Then, the column of n memory cells is represented as a single-memory-cell column comprising the representative memory cell. The column is thereafter functionally abstracted to derive a logic-level representation of the memory cell. After that is done, n-1 additional instances of the logic-level representation are generated. In this manner, the column of n memory cells is functionally abstracted as a column of n logic-level representations of the representative memory cell.
申请公布号 US7031898(B2) 申请公布日期 2006.04.18
申请号 US20010029547 申请日期 2001.12.21
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 JAIN ALOK;MARSCHNER ERICH;CHAKRABORTI SWAPNAJIT
分类号 G06F17/50;G11C11/22 主分类号 G06F17/50
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