| 摘要 |
In a non-volatile semiconductor memory device of the present invention, in the case of reading information from a second non-volatile memory element of an (i)-th twin memory cell and from a first non-volatile memory element of an (i+1)-th twin memory cell in the row direction, where i is an integer of not less than 1, the process senses an (i-1)-th bit line connecting with a first non-volatile memory element of the (i)-th twin memory cell, so as to detect an electric current running between the (i-1)-th bit line and an (i)-th bit line connecting with the second non-volatile memory element of the (i)-th twin memory cell, via the second non-volatile memory element of the (i)-th twin memory cell. The process also senses an (i+1)-th bit line connecting with a second non-volatile memory element of the (i+1)-th twin memory cell, so as to detect an electric current running between the (i+1)-th bit line and the (i)-th bit line connecting with the first non-volatile memory element of the (i+1)-th twin memory cell, via the first non-volatile memory element of the (i+1)-th twin memory cell. This arrangement enhances the access speed of the non-volatile semiconductor memory device consisting of twin memory cells.
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