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发明名称
半导体元件及其制造方法
摘要
本发明揭露一种半导体元件,其可改良操作期间的汲极崩溃电压(drain breakdown voltage)。此半导体元件包括第一汲极区域,其系设置成由汲极侧之闸极之端部的邻近区域朝向汲极之方向延伸;汲极接触区域,其系形成于第一汲极区域中且与汲极接触;以及第二汲极区域,其系形成在汲极接触区域之周围及下方。第二汲极接触区域的杂质浓度高于第一汲极接触区域之杂质浓度,且低于汲极接触区域之杂质浓度。在闸极侧之第二汲极区域的端部系位在远离闸极之端部一预定距离的位置。
申请公布号
TW200612471
申请公布日期
2006.04.16
申请号
TW094106782
申请日期
2005.03.07
申请人
富士通股份有限公司
发明人
市川宏道
分类号
H01L21/02
主分类号
H01L21/02
代理机构
代理人
恽轶群;陈文郎
主权项
地址
日本
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