发明名称 |
Chip bond layout for chip carrier for flip chip applications |
摘要 |
A chip carrier for flip chip applications, according to the present invention, provides peripheral bumps and inner bumps. The inputs and outputs related to the inner bumps are routed out on an additional wiring layer by means of vias. The proposed bond layout provides a high I/O count for a predefined chip size and a predefined carrier technology.
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申请公布号 |
US2006076691(A1) |
申请公布日期 |
2006.04.13 |
申请号 |
US20050135720 |
申请日期 |
2005.05.24 |
申请人 |
PRENGEL HELMUT;SCHNEIDER FRANK |
发明人 |
PRENGEL HELMUT;SCHNEIDER FRANK |
分类号 |
H01L23/48 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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