Semiconductor device and data reading method

摘要

The present invention has an arrangement that includes a Y decoder that selects a main bit line MBL to which sub bit lines SBL connected to memory cells MC are connected and selects main bit lines MBL adjacent to the selected main bit line MBL, and a YRST transistor that connects the adjacent main bit lines MBL to a given interconnection line and set these main bit lines to a given voltage. With this structure, it is possible to restrain noise from the adjacent main bit lines MBL to the minimum and prevent degradation of the voltage margin.