发明名称 NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS AND ITS DATA ERASING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data erasing method of a nonvolatile semiconductor memory apparatus in which the occurrence of an infinitive loop in which erasure and write-in are repeated at the time of erasing data can be prevented and a products defect rate can be reduced. <P>SOLUTION: Write-in is performed by applying voltage to a plurality of memory cells and write, a threshold value of the plurality of memory cells is set to voltage PV or more, after that, erasing is performed en bloc for the plurality of memory cells, the threshold value of the plurality of memory cells is set to voltage EV or less. Voltage being lower than voltage applied in the write-in is applied to each of memory cells having a lower threshold value than voltage OEV out of the plurality of memory cells, weak write-in is performed only once. Next, weak write-in is repeated until the threshold value becomes voltage OEV or more for memory cells having a lower threshold value than voltage OEV out of the plurality of memory cells. After that, when memory cells having higher value than voltage EV exist in the plurality of memory cells, operation is returned to operation in which the threshold value of the plurality of memory cells is set to voltage EV or less. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006099912(A) 申请公布日期 2006.04.13
申请号 JP20040287700 申请日期 2004.09.30
申请人 TOSHIBA CORP 发明人 WATABE HIROSHI;KATO HIDEO;KASAI TAKAMICHI;NARUGE KIYOMI;SASAKI HIROYUKI
分类号 G11C16/02;G11C16/04 主分类号 G11C16/02
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