发明名称 SILICON EPITAXIAL WAFER AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a silicon epitaxial wafer that reduces surface roughness possibly affecting quality in the manufacture of semiconductor integrated circuits and has small surface roughness in a silicon epitaxial wafer in which the plane orientation of a main surface is ä110}. SOLUTION: In the method for manufacturing a silicon epitaxial wafer in which the plane orientation of the main surface is ä110}, a temperature of 750-650°C in the cooling process after epitaxial growth is quenched at a rate that is larger than 500°C/minute. Or a substrate is used for annealing at 705°C±15°C, where the substrate grows a protective film on the surface at a temperature of 720°C or higher in the cooling process, or causes a silicon wafer used as the substrate to be inclined by 4.6°(±1.6°or smaller) in the direction of ä110} or ä111} orthogonally crossing the main surface from ä110} in the main surface. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006100596(A) 申请公布日期 2006.04.13
申请号 JP20040285369 申请日期 2004.09.29
申请人 SUMCO CORP 发明人 YANASE YOSHIO
分类号 H01L21/205 主分类号 H01L21/205
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