发明名称 SIGNAL OUTPUT CIRCUIT
摘要 <p>An LVDS output circuit steadily supplying an output current of magnitude I comprises a current source (101) outputting a current of magnitude 2I, current sources (102, 103, 106, 107) supplying a current of ?I, and current sources (104, 105) supplying a current of magnitude I-?I. Switches (117, 118) switch the polarity of output depending on an input signal (116). When the polarity is changed, switches (108, 109) are turned off and switches (110, 111) are turned on, and the output amplitude becomes (I+?I). Alternatively, the switches (108, 109) are turned on and the switches (110, 111) are turned off, and the output amplitude becomes (-I-?I). In other words, balance of currents flowing through the current sources (102-107) is varied and preemphasis is carried out, but total current of the current sources (102-107) and power consumption are kept constant. With such a means, signal transmission rate can be increased while suppressing power supply noise.</p>
申请公布号 WO2006038346(A1) 申请公布日期 2006.04.13
申请号 WO2005JP10238 申请日期 2005.06.03
申请人 AOIKE, MASAHIRO;MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 AOIKE, MASAHIRO
分类号 (IPC1-7):H03K19/017 主分类号 (IPC1-7):H03K19/017
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