| 摘要 |
Disclosed is a semiconductor memory device including a plurality of diffusion regions, select gates, word lines, and common diffusion regions. The plurality of diffusion regions are extended in the surface of a substrate in a memory cell area, being spaced apart to one another in one direction, and constitute bit lines. The select gates are configured to be extended in one direction over the substrate. The word lines are extended in a direction orthogonal to the one direction and cross the select gates. The bit line diffusion regions are formed by self alignment using floating gates over the sidewalls of select gates as masks, and each of the bit line diffusion regions is separated into at least two regions in the one direction. The common diffusion regions are provided in an area of the isolation in a direction orthogonal to the one direction. The mutually adjacent common diffusion regions are separated to each other through the select gates, and the separated common diffusion regions are connected to an upper layer interconnect through contacts.
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