发明名称 Row decoder circuit of NAND flash memory and method of supplying an operating voltage using the same
摘要 A row decoder circuit of a NAND flash memory and method of supplying an operating voltage using the same. To prevent an operating voltage (e.g., a program voltage, a pass voltage, or a read voltage) from being abnormally transferred to a gate of a memory cell because a pumping voltage is applied to a gate of a high-voltage pass transistor of the row decoder circuit in a level lower than a target voltage, the pumping voltage is first applied to the gate of the high-voltage pass transistor (i.e., precharging the gate of the high-voltage pass transistor) and next the operating voltage is applied to a drain of the high voltage pass transistor. Thus, the pumping voltage becomes higher than the target voltage due to a self-boosting effect through the structure of transistor, enabling the operating voltage to be normally transferred to the gate of the memory cell.
申请公布号 US2006077716(A1) 申请公布日期 2006.04.13
申请号 US20050158346 申请日期 2005.06.22
申请人 PARK SE C 发明人 PARK SE C.
分类号 G11C11/34 主分类号 G11C11/34
代理机构 代理人
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