发明名称 CLAMPING CIRCUIT DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a clamping circuit device which can be constituted of fewer elements' in a simple fashion. <P>SOLUTION: Reference voltages V1, V2 are set up by a series circuit of an FET 1, a resistor 2 and an FET 3. Gate potentials V4, V5 of FETs 7, 11 are set up, by performing addition and subtraction of these reference voltages and a reference voltage V2 generated by a bandgap reference circuit 6, respectively using an addition circuit 4 and a subtraction circuit 9. The clamp circuit device 12 is configured by connecting together a source of the one FET 7 with its drain connected with the power supply and a source of the other FET 11 with its drain being connected with the ground to an input terminal of a control IC unit 8. Thus, voltage is clamped to [V4+Vtp], when an excessive voltage of positive polarity is applied to an input terminal, and the voltage is clamped to [V5-Vtn], when an excessive voltage of negative polarity is applied. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006101465(A) 申请公布日期 2006.04.13
申请号 JP20040314012 申请日期 2004.10.28
申请人 DENSO CORP 发明人 MIZAWA MASATOYO;ISHIKAWA YASUYUKI;SUZUKI AKIRA;TEJIMA YOSHINORI;ISHIHARA HIDEAKI;MURAMATSU TOSHIJI;NASU TADASHI
分类号 H03G11/02 主分类号 H03G11/02
代理机构 代理人
主权项
地址