| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce power consumption by generating a clock suitable to memory traffic. <P>SOLUTION: A memory interface circuit having a queuing buffer for queuing memory transactions comprises a determination means for determining increase or decrease of the frequency of a memory clock or memory interface clock according to whether or not the queuing state in the queuing buffer is a predetermined state, and a memory clock frequency updating means for increasing or decreasing the frequency of the memory clock or memory interface clock according to the determination of the determination means. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p> |
