发明名称 |
System and method for accurate negative bias temperature instability characterization |
摘要 |
Methods and systems are provided for characterizing the negative temperature bias instability of a transistor. A bias voltage is maintained at a drain terminal of the transistor during a test period. A stress voltage is maintained at a gate terminal of the transistor during the test period, such that the stress voltage is applied concurrently with the bias voltage. At least one characteristic of the transistor is measured at periodic intervals during the stress period to determine a degradation of the at least one characteristic caused by the stress voltage until a termination event occurs.
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申请公布号 |
US2006076971(A1) |
申请公布日期 |
2006.04.13 |
申请号 |
US20050290077 |
申请日期 |
2005.11.30 |
申请人 |
KRISHNAN ANAND T;KRISHNAN SRIKANTH;REDDY VIJAY;CHANCELLOR CATHY |
发明人 |
KRISHNAN ANAND T.;KRISHNAN SRIKANTH;REDDY VIJAY;CHANCELLOR CATHY |
分类号 |
G01R31/26 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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