发明名称 |
Festspeicher in integrierter Schaltungsbauweise mit zwei UEbergaengen und Verfahren zu dessen Herstellung |
摘要 |
1352716 Read-only memories INTERSIL Inc 27 July 1971 [14 Dec 1970] 35133/71 Heading G4A [Also in Division H1] An integrated circuit read-only memory comprises row and column conductors having a pair of back-to-back diodes (e.g. formed by the two junctions in a transistor) connected between them at each crossing point, information being recorded in the store by applying an electrical surface short across one diode in selected pairs so as to leave a conduction path between the row and column conductors through the remaining diodes of the selected pairs. Preferably the short is formed by applying a reverse bias voltage in excess of the junction breakdown voltage across the junction to cause migration of the metal of the contacts along the top of the semi-conductor material beneath its oxide insulating layer. |
申请公布号 |
DE2132570(A1) |
申请公布日期 |
1972.06.22 |
申请号 |
DE19712132570 |
申请日期 |
1971.06.30 |
申请人 |
INTERSIL MEMORY CORP. |
发明人 |
DONALD RIZZI,JOSEPH;DALE FAGAN,LLOYD |
分类号 |
E03D13/00;G11C17/06;G11C17/16;G11C17/18;H01L23/522;H01L27/102 |
主分类号 |
E03D13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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