发明名称 HIGH PERFORMANCE WIRELESS RECEIVER WITH CLUSTER MULTIPATH INTERFERENCE SUPPRESSION CIRCUIT.
摘要 <p>A receiver which suppresses inter-cluster multipath interference by processing an impulse channel response consisting of two multipath clusters, each cluster having groups of signals with multiple delays. In one embodiment, the receiver includes a single antenna and parallel-connected delay units used to align the groups of signals before being input into respective sliding window equalizers. The outputs of the equalizers are combined at chip level via a combiner which provides a single output. In another embodiment, a Cluster Multipath Interference Suppression (CMIS) circuit is incorporated into the receiver. The CMIS circuit includes a hard decision unit and a plurality of signal regeneration units to generate replicas of the multipath clusters. The replicas are subtracted from the respective outputs of the delay units and the results are input to the respective sliding window equalizers. In another embodiment, multiple antennas are used to receive and process the clusters.</p>
申请公布号 MXPA06000599(A) 申请公布日期 2006.04.11
申请号 MX2006PA00599 申请日期 2004.07.13
申请人 INTERDIGITAL TECHNOLOGY CORPORATION. 发明人 ALEXANDER REZNIK
分类号 H04B1/00;H04B1/7115;H04L25/03;H04Q;(IPC1-7):H04B1/00 主分类号 H04B1/00
代理机构 代理人
主权项
地址