发明名称 |
Planarizing method for forming FIN-FET device |
摘要 |
A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate electrode. Since the blanket planarizing layer is formed as a planarizing layer, a photoresist layer formed thereupon is formed with enhanced resolution. As a result, the gate electrode is also formed with enhanced resolution. A resulting FIN-FET structure has the patterned planarizing layer formed in an inverted "U" shape upon the gate electrode.
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申请公布号 |
US7026195(B2) |
申请公布日期 |
2006.04.11 |
申请号 |
US20040851376 |
申请日期 |
2004.05.21 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
CHENG CHUNG-LONG;THEI KONG-BENG |
分类号 |
H01L21/00;H01L21/302;H01L21/3213;H01L21/336;H01L29/423;H01L29/76;H01L29/786 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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