System and method for controlling data transfer for data array control unit having first and second selector with data shift register

摘要

A data register which outputs an input data as is when the input data fulfills a set data width for outputting, and holds the input data until a bit width of the input data is equal to or more than the set data width, in response to a first enable signal. A first selector which selects an n-bit byte lane from a (2n-1)-bit byte lane of the data register in response to a first select signal, and a second selector which selects an n-bit byte lane out of a (2n-1)-bit byte lane and outputs a valid data in response to a second select signal. A data buffer which receives and stores the valid data in response to a second enable signals.