DEEP TRENCH ELECTRICALLY ISOLATED MEDIUM VOLTAGE CMOS DEVICES AND METHOD FOR MAKING THE SAME

摘要

A medium voltage CMOS semiconductor device (20) provides for higher transistor (201) densities by using a deep trench structure (230) to electrically isolate adjacent transistors (210). The device includes a semiconductor substrate (200); first and second medium voltage MOS transistors (210) each having a channel region (215) in the semiconductor substrate (200); a field oxide region (220) on the semiconductor substrate (200) extending between and separating the first and second medium voltage MOS transistors (210); a trench (230) extending from the field oxide region (220) down to a depth greater than a depth of space charge regions of the first and second medium voltage MOS transistors (210); and a dielectric material disposed in the trench (230).