发明名称 DATA STORAGE SYSTEM AND MEMORY CARD
摘要 <p>In an illustrative case of updating the memory content at a target end, which is now, for example, 5A'h, to 5B'h via data transmission from an initiator to the target, the initiator transmits, to the target, data of 01'h indicating whether an updating is to be performed per bit (a bit to be updated is "1" and a bit not to be updated is "0"). When receiving the data of 01'h, the target retrieves, from among the data of its own memory contents, and reverses the data of the bit (in this case, the last bit) corresponding to a bit to be updated, and then restores the data as reversed.</p>
申请公布号 WO2006035500(A1) 申请公布日期 2006.04.06
申请号 WO2004JP14228 申请日期 2004.09.29
申请人 RENESAS TECHNOLOGY CORP.;SUZUKI, SHINICHI 发明人 SUZUKI, SHINICHI
分类号 (IPC1-7):G05F3/06;G06F3/08;G06F13/16;G06F13/38;G06K17/00;G06F12/00 主分类号 (IPC1-7):G05F3/06
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