Integrated semiconductor memory, e.g. for dynamic RAM, has word wires linked to voltage potentials via switches conductively controlled in a test operating condition

摘要

Word wires (WL) can be linked to a first voltage potential (VWL) via first (11) and third (13) controllable switches (CS) and to a second voltage potential (VPP) via a second CS (12). After conductive control of each first and third CS, each second CS is conductively controlled in a test operating condition for an integrated semiconductor memory. An independent claim is also included for a method for testing an integrated semiconductor memory.