| 摘要 |
<p>A high power FET switch comprises an N- drift layer, in which pairs of trenches are recessed to a predetermined depth; oxide side-walls extend to the trench bottom, and each trench is filled with a conductive material. N+ and metal layers on opposite sides of the drift layer provide drain and source connections for the FET, and the conductive material in each trench is connected together to provide a gate connection. A shallow P region extends across the bottom and around the corners of each trench's side-walls into the drift layer. The application of a sufficient gate voltage causes holes to be injected from the shallow P regions into the N- drift layer, thereby modulating the drift layer's conductivity and lowering the device's on-resistance, and enabling current to flow between the drain and source connections.</p> |
