| 摘要 |
PROBLEM TO BE SOLVED: To provide a frequency divider capable of reducing a probability of output error occurrence caused by circuit configuration by making common a voltage/current converting unit that causes phase error and/or amplitude error generation. SOLUTION: The frequency divider comprises: a voltage/current converting unit 11 that uses a differential pair of transistors (Tr) Q1 and Q2 to convert a clock signal CLK1 of a voltage signal and a clock inverse signal CLK2 of a complementary signal of CLK1 into current signals; and an I-Q signal generating unit 12 including Tr Q11, Q12, and Tr Q5, Q6 which input a current signal i101 output from the Tr Q1 to generate, respectively two first signal and/or second signal of which phases differ from each other at 180°, and Tr Q9, Q10 and Tr Q7, Q8 which input a current signal i102 output from the Tr Q2 to generate, respectively two third and/or fourth signals of which phases differ from each other at 180°. The phase difference between the first and/or third signals of the I-Q signal generating unit 12 is 90°and the phase difference between the second and/or fourth signals is 90°. COPYRIGHT: (C)2006,JPO&NCIPI
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