发明名称 Methods of fabricating flash memory devices with floating gates that have reduced seams
摘要 Methods of fabricating a floating gate of a flash memory cell are provided in which a first polysilicon layer is formed between first and second isolation layers. An upper region of the first polysilicon layer is then oxidized. The oxidized upper region of the first polysilicon layer is subsequently removed. A second polysilicon layer is formed on the first polysilicon layer. The second polysilicon layer and the first polysilicon layer are patterned to form the floating gate.
申请公布号 US2006073653(A1) 申请公布日期 2006.04.06
申请号 US20050240234 申请日期 2005.09.30
申请人 JANG WON-JUN;KIM JUNG-HWAN;LEE JAI-DONG;YOU YOUNG-SUB;LEE SANG-HUN;LEAM HUN-HYEOUNG 发明人 JANG WON-JUN;KIM JUNG-HWAN;LEE JAI-DONG;YOU YOUNG-SUB;LEE SANG-HUN;LEAM HUN-HYEOUNG
分类号 H01L21/8238 主分类号 H01L21/8238
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