| 摘要 |
Techniques are presented for creating a second clock signal by using a first clock signal. For instance, an output is determined that corresponds to a phase relationship between the first and second clock signals. A value, corresponding to a given one of a plurality of delays, is selected based at least partially on the output. The given delay is created, by using the value, on the first clock signal to produce the second clock signal, whereby the given delay creates a phase shift between the first and second clock signals.
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